Memory Addressing

The capacity of a memory unit is defined by the number of words multiplied by the number of bits per word. How many separate address and data line are needed for a memory of 4K × 16?

In the virtual memory system, the address space specified by address lines of the CPU must be ______ than the physical memory size and ______ than the secondary storage size.

A computer system has 16-bit wide address/ data bus that uses RAM chips of 4K $\times$ 8-bit capacity. The number of RAM chips are needed to provide a memory capacity of 64 Kbytes memory is

A CPU generates 32 bits virtual addresses. The page size is 4 KB. The processor has a translation look-aside buffer (TLB) which can hold a total of 128-page table entries and is 4- way set associate. The minimum size of the TLB tag is

Consider a system with a CPU having 6 registers and 32-bit instructions. The maximum possible size of the main memory is 512 KB (1K = 2¹⁰). Each instruction takes two registers and one memory address as operands. Which one of the following correctly gives the maximum possible distinct instructions that can be there in the instruction set of the CPU?