The CPU generates 32-bit virtual addresses with a 4 KB page size. The TLB holds 128 page table entries and is 4-way set associative.

We split the 32-bit virtual address into:

The TLB has 128 entries, and with 4-way set associativity, there are:

128 / 4 = 32 sets, so we need 5 bits for the index.

The total number of bits for the virtual address is 32:

The minimum size of the TLB tag is: 15 bits

Cache Memory